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1/17 may 2002 M27W801 8 mbit (1mb x8) low voltage uv eprom and otp eprom n 2.7v to 3.6v supply voltage in read operation n access time: C80ns at v cc = 3.0v to 3.6v C 100ns at v cc = 2.7v to 3.6v n pin compatible with m27c801 n low power consumption: C 30a max standby current C 15ma max active current at 5mhz n programming time 50s/byte n high reliability cmos technology C 2,000v esd protection C 200ma latchup protection immunity n electronic signature C manufacturer code: 20h C device code: 42h description the M27W801 is a low voltage 8 mbit eprom of- fered in the two ranges uv (ultra violet erase) and otp (one time programmable). it is ideally suited for microprocessor systems requiring large data or program storage and is organized as 1,048,576 by 8 bits. the M27W801 operates in the read mode with a supply voltage as low as 2.7v at C40 to 85c tem- perature range. the decrease in operating power allows either a reduction of the size of the battery or an increase in the time between battery re- charges. the fdip32w (window ceramic frit-seal package) has a transparent lids which allow the user to ex- pose the chip to ultraviolet light to erase the bit pat- tern. a new pattern can then be written to the device by following the programming procedure. for applications where the content is programmed only one time and erasure is not required, the M27W801 is offered in pdip32, plcc32 and tsop32 (8 x 20 mm) packages. figure 1. logic diagram ai02363 20 a0-a19 q0-q7 v cc M27W801 v ss 8 gv pp e 1 32 fdip32w (f) plcc32 (k) tsop32 (n) 8 x 20 mm 32 1 pdip32 (b)
M27W801 2/17 figure 2b. plcc connections ai02365 a17 a8 a10 q5 17 a1 a0 q0 q1 q2 q3 q4 a7 a4 a3 a2 a6 a5 9 a18 a9 1 a16 a11 a13 a12 q7 32 a19 v cc M27W801 a15 a14 q6 gv pp e 25 v ss figure 2a. dip connections a1 a0 q0 a7 a4 a3 a2 a6 a5 a13 a10 a8 a9 q7 a14 a11 gv pp e q5 q1 q2 q3 v ss q4 q6 a17 a18 a16 a12 a19 v cc a15 ai02671 M27W801 8 1 2 3 4 5 6 7 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 table 1. signal names a0-a19 address inputs q0-q7 data outputs e chip enable g v pp output enable / program supply v cc supply voltage v ss ground figure 2c. tsop connections a1 a0 q0 a7 a4 a3 a2 a6 a5 a13 a10 a8 a9 q7 a14 a11 gv pp e q5 q1 q2 q3 q4 q6 a17 a18 a16 a12 a19 v cc a15 ai02366 M27W801 (normal) 8 1 9 16 17 24 25 32 v ss
3/17 M27W801 table 2. absolute maximum ratings (1) note: 1. except for the rating "operating temperature range", stresses above those listed in the table "absolute maximum ratings" may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other condition s above those indicated in the operating sections of this specification is not implied. exposure to absolute maximum rating condi - tions for extended periods may affect device reliability. refer also to the stmicroelectronics sure program and other relevant qual- ity documents. 2. minimum dc voltage on input or output is C0.5v with possible undershoot to C2.0v for a period less than 20ns. maximum dc voltage on output is v cc +0.5v with possible overshoot to v cc +2v for a period less than 20ns. 3. depends on range. table 3. operating modes note: x = v ih or v il , v id = 12v 0.5v. table 4. electronic signature symbol parameter value unit t a ambient operating temperature (3) C40 to 125 c t bias temperature under bias C50 to 125 c t stg storage temperature C65 to 150 c v io (2) input or output voltage (except a9) C2 to 7 v v cc supply voltage C2 to 7 v v a9 (2) a9 voltage C2 to 13.5 v v pp program supply voltage C2 to 14 v mode e g v pp a9 q7-q0 read v il v il x data out output disable v il v ih x hi-z program v il pulse v pp xdata in program inhibit v ih v pp x hi-z standby v ih x x hi-z electronic signature v il v il v id codes identifier a0 q7 q6 q5 q4 q3 q2 q1 q0 hex data manufacturers code v il 00100000 20h device code v ih 01000010 42h
M27W801 4/17 device operation the operating modes of the M27W801 are listed in the operating modes table. a single power supply is required in the read mode. all inputs are ttl levels except for g v pp and 12v on a9 for elec- tronic signature and margin mode set or reset. read mode the M27W801 has two control functions, both of which must be logically active in order to obtain data at the outputs. chip enable (e ) is the power control and should be used for device selection. output enable (g ) is the output control and should be used to gate data to the output pins, indepen- dent of device selection. assuming that the ad- dresses are stable, the address access time (t avqv ) is equal to the delay from e to output (t elqv ). data is available at the output after a delay of t glqv from the falling edge of g , assuming that e has been low and the addresses have been sta- ble for at least t avqv -t glqv . standby mode the M27W801 has a standby mode which reduc- es the supply current from 15ma to 20a with low voltage operation v cc 3.6v, see read mode dc characteristics table for details. the M27W801 is placed in the standby mode by applying a cmos high signal to the e input. when in the standby mode, the outputs are in a high impedance state, independent of the g v pp input. table 5. ac measurement conditions high speed standard input rise and fall times 10ns 20ns (10% to 90%) input pulse voltages 0 to 3v 0.4v to 2.4v input and output timing ref. voltages 1.5v 0.8v and 2v figure 3. ac testing input output waveform ai01822 3v high speed 0v 1.5v 2.4v standard 0.4v 2.0v 0.8v figure 4. ac testing load circuit ai01823b 1.3v out c l c l = 30pf for high speed c l = 100pf for standard c l includes jig capacitance 3.3k w 1n914 device under test table 6. capacitance (1) (t a = 25 c, f = 1 mhz) note: 1. sampled only, not 100% tested. symbol parameter test condition min max unit c in input capacitance v in = 0v 6pf c out output capacitance v out = 0v 12 pf
5/17 M27W801 table 7. read mode dc characteristics (1) (t a = C40 to 85 c; v cc = 2.7v to 3.6v; v pp = v cc ) note: 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or after v pp . 2. maximum dc voltage on output is v cc +0.5v. symbol parameter test condition min max unit i li input leakage current 0v v in v cc 10 a i lo output leakage current 0v v out v cc 10 a i cc supply current e = v il , g v pp = v il , i out = 0ma, f = 5mhz, v cc 3.6v 15 ma i cc1 supply current (standby) ttl e = v ih 1ma i cc2 supply current (standby) cmos e > v cc C 0.2v, v cc 3.6v 30 a i pp program current v pp = v cc 10 a v il input low voltage C0.6 0.2 v cc v v ih (2) input high voltage 0.7 v cc v cc + 0.5 v v ol output low voltage i ol = 2.1ma 0.4 v v oh output high voltage ttl i oh = C1ma 2.4 v two line output control because eproms are usually used in larger memory arrays, the product features a 2 line con- trol function which accommodates the use of mul- tiple memory connection. the two line control function allows: a. the lowest possible memory power dissipation, b. complete assurance that output bus contention will not occur. for the most efficient use of these two control lines, e should be decoded and used as the prima- ry device selecting function, while g should be made a common connection to all devices in the array and connected to the read line from the system control bus. this ensures that all deselect- ed memory devices are in their low power standby mode and that the output pins are only active when data is required from a particular memory device. system considerations the power switching characteristics of advanced cmos eproms require careful decoupling of the devices. the supply current, i cc , has three seg- ments that are of interest to the system designer: the standby current level, the active current level, and transient current peaks that are produced by the falling and rising edges of e . the magnitude of the transient current peaks is dependent on the capacitive and inductive loading of the device at the output. the associated transient voltage peaks can be suppressed by complying with the two line output control and by properly selected decoupling capacitors. it is recommended that a 0.1f ceram- ic capacitor be used on every device between v cc and v ss . this should be a high frequency capaci- tor of low inherent inductance and should be placed as close to the device as possible. in addi- tion, a 4.7f bulk electrolytic capacitor should be used between v cc and v ss for every eight devic- es. the bulk capacitor should be located near the power supply connection point. the purpose of the bulk capacitor is to overcome the voltage drop caused by the inductive effects of pcb traces.
M27W801 6/17 figure 5. read mode ac waveforms ai01583b taxqx tehqz a0-a19 e g q0-q7 tavqv tghqz tglqv telqv valid hi-z valid table 8. read mode ac characteristics (1) (t a = C40 to 85 c; v cc = 2.7v to 3.6v; v pp = v cc ) note: 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or after v pp . 2. sampled only, not 100% tested. 3. speed obtained with high speed ac measurement conditions. symbol alt parameter test condition M27W801 unit -100 (3) -120 (-150/-200) v cc = 3.0v to 3.6v v cc = 2.7v to 3.6v v cc = 2.7v to 3.6v min max min max min max t avqv t acc address valid to output valid e = v il , g = v il 80 100 120 ns t elqv t ce chip enable low to output valid g = v il 80 100 120 ns t glqv t oe output enable low to output valid e = v il 50 60 70 ns t ehqz (2) t df chip enable high to output hi-z g = v il 050060070ns t ghqz (2) t df output enable high to output hi-z e = v il 050060070ns t axqx t oh address transition to output transition e = v il , g = v il 000ns
7/17 M27W801 table 9. programming mode dc characteristics (1) (t a = 25 c; v cc = 6.25v 0.25v; v pp = 12.75v 0.25v) note: 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or after v pp . table 10. margin mode ac characteristics (1) (t a = 25 c; v cc = 6.25v 0.25v; v pp = 12.75v 0.25v) note: 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or after v pp . symbol parameter test condition min max unit i li input leakage current v il v in v ih 10 m a i cc supply current 50 ma i pp program current e = v il 50 ma v il input low voltage C0.3 0.8 v v ih input high voltage 2 v cc + 0.5 v v ol output low voltage i ol = 2.1ma 0.4 v v oh output high voltage ttl i oh = C1ma 3.6 v v id a9 voltage 11.5 12.5 v symbol alt parameter test condition min max unit t a9hvph t as9 v a9 high to v pp high 2s t vphel t vps v pp high to chip enable low 2s t a10heh t as10 v a10 high to chip enable high (set) 1s t a10leh t as10 v a10 low to chip enable high (reset) 1s t exa10x t ah10 chip enable transition to v a10 transition 1s t exvpx t vph chip enable transition to v pp transition 2s t vpxa9x t ah9 v pp transition to v a9 transition 2s programming the M27W801 has been designed to be fully com- patible with the m27c801 and has the same elec- tronic signature. as a result the M27W801 can be programmed as the m27c801 on the same pro- gramming equipment applying 12.75v on v pp and 6.25v on v cc by the use of the same presto iib algorithm. when delivered (and after each 1s era- sure for uv eprom), all bits of the M27W801 are in the "1" state. data is introduced by selectively programming "0"s into the desired bit locations.al- though only '0' will be programmed, both "1" and "0" can be present in the data word. the only way to change a 0 to a 1 is by die exposure to ultra- violet light (uv eprom). the M27W801 is in the programming mode when v pp input is at 12.75v and e is pulsed to v il . the data to be programmed is applied to 8 bits in parallel to the data output pins. the levels required for the address and data inputs are ttl. v cc is specified to be 6.25v 0.25v.
M27W801 8/17 table 11. programming mode ac characteristics (1) (t a = 25 c; v cc = 6.25v 0.25v; v pp = 12.75v 0.25v) note: 1. v cc must be applied simultaneously with or before v pp and removed simultaneously or after v pp . 2. sampled only, not 100% tested. symbol alt parameter test condition min max unit t av el t as address valid to chip enable low 2 s t qvel t ds input valid to chip enable low 2 s t vchel t vcs v cc high to chip enable low 2s t vphel t oes v pp high to chip enable low 2s t vplvph t prt v pp rise time 50 ns t eleh t pw chip enable program pulse width (initial) 45 55 s t ehqx t dh chip enable high to input transition 2 s t ehvpx t oeh chip enable high to v pp transition 2s t vplel t vr v pp low to chip enable low 2s t elqv t dv chip enable low to output valid 1 s t ehqz (2) t dfp chip enable high to output hi-z 0 130 ns t ehax t ah chip enable high to address transition 0 ns figure 6. margin mode ac waveforms note: a8 high level = 5v; a9 high level = 12v. ai00736b ta9hvph tvpxa9x a8 e gv pp a10 set v cc tvphel ta10leh texvpx ta10heh a9 a10 reset texa10x
9/17 M27W801 presto iib programming algorithm presto iib programming algorithm allows the whole array to be programmed with a guaranteed margin, in a typical time of 52.5 seconds. this can be achieved with stmicroelectronics M27W801 due to several design innovations to improve pro- gramming efficiency and to provide adequate mar- gin for reliability. before starting the programming the internal margin mode circuit must be set in order to guarantee that each cell is programmed with enough margin. then a sequence of 50s program pulses are applied to each byte until a correct verify occurs (see figure 8). no overpro- gram pulses are applied since the verify in mar- gin mode at v cc much higher than 3.6v, provides the necessary margin. program inhibit programming of multiple M27W801s in parallel with different data is also easily accomplished. ex- cept for e , all like inputs including g v pp of the par- allel M27W801 may be common. a ttl low level pulse applied to a M27W801's e input, with v pp at 12.75v, will program that M27W801. a high level e input inhibits the other M27W801s from being programmed. program verify a verify (read) should be performed on the pro- grammed bits to determine that they were correct- ly programmed. the verify is accomplished with g at v il . data should be verified with t elqv after the falling edge of e . figure 7. programming and verify modes ac waveforms tavel valid ai01270 a0-a19 q0-q7 v cc data in data out e tqvel tvchel tvphel tehqx tehvpx telqv teleh tehqz tvplel program verify gv pp tehax figure 8. programming flowchart ai01271c n = 0 last addr verify e = 50 m s pulse ++n = 25 ++ addr v cc = 6.25v, v pp = 12.75v fail check all bytes 1st: v cc = 5v 2nd: v cc = 2.7v yes no yes no yes no set margin mode reset margin mode
M27W801 10/17 electronic signature the electronic signature (es) mode allows the reading out of a binary code from an eprom that will identify its manufacturer and type. this mode is intended for use by programming equipment to automatically match the device to be programmed with its corresponding programming algorithm. the es mode is functional in the 25c 5c am- bient temperature range that is required when pro- gramming the M27W801. to activate the es mode, the programming equipment must force 11.5v to 12.5v on address line a9 of the M27W801. two identifier bytes may then be se- quenced from the device outputs by toggling ad- dress line a0 from v il to v ih . all other address lines must be held at v il during electronic signa- ture mode. byte 0 (a0 = v il ) represents the manufacturer code and byte 1 (a0 = v ih ) the device identifier code. for the stmicroelectronics M27W801, these two identifier bytes are given in table 4 and can be read-out on outputs q7 to q0. note that the M27W801 and m27c801 have the same identifier byte. erasure operation (applies to uv eprom) the erasure characteristics of the M27W801 is such that erasure begins when the cells are ex- posed to light with wavelengths shorter than ap- proximately 4000 ?. it should be noted that sunlight and some type of fluorescent lamps have wavelengths in the 3000-4000 ? range. research shows that constant exposure to room level fluorescent lighting could erase a typical M27W801 in about 3 years, while it would take ap- proximately 1 week to cause erasure when ex- posed to direct sunlight. if the M27W801 is to be exposed to these types of lighting conditions for extended periods of time, it is suggested that opaque labels be put over the M27W801 window to prevent unintentional erasure. the recommend- ed erasure procedure for the M27W801 is expo- sure to short wave ultraviolet light which has wavelength 2537 ?. the integrated dose (i.e. uv intensity x exposure time) for erasure should be a minimum of 30 w-sec/cm 2 . the erasure time with this dosage is approximately 30 to 40 minutes us- ing an ultraviolet lamp with 12000 w/cm 2 power rating. the M27W801 should be placed within 2.5 cm (1 inch) of the lamp tubes during the erasure. some lamps have a filter on their tubes which should be removed before erasure.
11/17 M27W801 table 12. ordering information scheme note: 1. high speed, see ac characteristics section for further information. 2. this speed also guarantees 80ns access time at v cc = 3.0v to 3.6v. 3. these speeds are replaced by the 120ns. 4. packages option available on request. please contact stmicroelectronics local sales office. for a list of available options (speed, package, etc...) or for further information on any aspect of this de- vice, please contact the stmicroelectronics sales office nearest to you. example: M27W801 -80 k 6 tr device type m27 supply voltage w = 2.7v to 3.6v device function 801 = 8 mbit (1mb x8) speed -100 (1,2) = 80 ns -120 = 120 ns not for new design (3) -150 = 150 ns -200 = 200 ns package f = fdip32w (4) b = pdip32 k = plcc32 n = tsop32: 8 x 20 mm (4) temperature range 6 = C40 to 85 c options tr = tape & reel packing
M27W801 12/17 table 13. revision history date version revision details july 1999 -01 first issue 15-mar-2000 -02 fdip32w package dimension, l max added (table 14) tsop32 package dimension changed (table 17) 0 to 70c temperature range removed programming time changed 21-apr-2000 -03 read mode ac characteristics: t avqv , t elqv , t glqv , t ehqz , t ghqz changed (table 8) 20-feb-2002 -04 pdip32 mechanical data and drawing changed (table 15) plcc32 mechanical data: a2 clarified (table 16) read mode dc characteristics: v oh clarified (table 7) 06-may-2002 -05 plcc32 mechanical data and drawing clarified (table 16, figure 11) i cc standby value clarified
13/17 M27W801 table 14. fdip32w - 32 pin ceramic frit-seal dip, with window, package mechanical data symb mm inches typ min max typ min max a 5.72 0.225 a1 0.51 1.40 0.020 0.055 a2 3.91 4.57 0.154 0.180 a3 3.89 4.50 0.153 0.177 b 0.41 0.56 0.016 0.022 b1 1.45 C C 0.057 C C c 0.23 0.30 0.009 0.012 d 41.73 42.04 1.643 1.655 d2 38.10 C C 1.500 C C e 15.24 C C 0.600 C C e1 13.06 13.36 0.514 0.526 e 2.54 C C 0.100 C C ea 14.99 C C 0.590 C C eb 16.18 18.03 0.637 0.710 l 3.18 4.10 0.125 0.161 s 1.52 2.49 0.060 0.098 k 6.60 C C 0.260 C C k1 10.67 C C 0.420 C C a 4 11 4 11 n 32 32 figure 9. fdip32w - 32 pin ceramic frit-seal dip with window, package outline drawing is not to scale. fdipw-b a3 a1 a l b1 b e1 d s e1 e n 1 c ea d2 k k1 a eb a2
M27W801 14/17 table 15. pdip32 - 32 pin plastic dip, 600 mils width, package mechanical data symbol millimeters inches typ min max typ min max a 4.83 0.190 a1 0.38 0.015 a2 3.81 0.150 b 0.41 0.53 0.016 0.021 b1 1.14 1.65 0.045 0.065 c 0.23 0.38 0.009 0.015 d 41.78 42.29 1.645 1.665 ea 15.24 C C 0.600 C C e 2.54 C C 0.100 C C e 15.24 15.88 0.600 0.625 e1 13.46 13.97 0.530 0.550 l 3.05 3.56 0.120 0.140 n32 32 s 1.65 2.21 0.065 0.087 a 0 15 0 15 figure 10. pdip32 - 32 pin plastic dip, 600 mils width, package outline drawing is not to scale. pdip-c a2 a1 a l b1 b e d s e1 e n 1 c a ea d2
15/17 M27W801 table 16. plcc32 - 32 lead plastic leaded chip carrier, package mechanical data symbol millimeters inches typ min max typ min max a 3.18 3.56 0.125 0.140 a1 1.53 2.41 0.060 0.095 a2 0.38 C 0.015 C b 0.33 0.53 0.013 0.021 b1 0.66 0.81 0.026 0.032 cp 0.10 0.004 d 12.32 12.57 0.485 0.495 d1 11.35 11.51 0.447 0.453 d2 4.78 5.66 0.188 0.223 d3 7.62 C C 0.300 C C e 14.86 15.11 0.585 0.595 e1 13.89 14.05 0.547 0.553 e2 6.05 6.93 0.238 0.273 e3 10.16 C C 0.400 C C e 1.27 C C 0.050 C C f 0.00 0.13 0.000 0.005 n32 32 r 0.89 C C 0.035 C C figure 11. plcc32 - 32 lead plastic leaded chip carrier, package outline drawing is not to scale. plcc-a d e3 e1 e 1 n d1 d3 cp b e2 e b1 a1 a r 0.51 (.020) 1.14 (.045) f a2 e2 d2 d2
M27W801 16/17 figure 12. tsop32 - 32 lead plastic thin small outline, 8 x 20 mm, package outline drawing is not to scale. tsop-a d1 e 1 n cp b e a2 a n/2 d die c l a1 a table 17. tsop32 - 32 lead plastic thin small outline, 8 x 20 mm, package mechanical data symbol mm inch typ min max typ min max a 1.200 0.0472 a1 0.050 0.150 0.0020 0.0059 a2 0.950 1.050 0.0374 0.0413 b 0.150 0.270 0.0059 0.0106 c 0.100 0.210 0.0039 0.0083 d 19.800 20.200 0.7795 0.7953 d1 18.300 18.500 0.7205 0.7283 e 0.500 C C 0.0197 C C e 7.900 8.100 0.3110 0.3189 l 0.500 0.700 0.0197 0.0276 a 0 5 0 5 cp 0.100 0.0039 n32 32
17/17 M27W801 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is registered trademark of stmicroelectronics all other names are the property of their respective owners. ? 2002 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malt a - morocco - singapore - spain - sweden - switzerland - united kingdom - united states www.st.com

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